State Diagram In Software Engineering

State Diagram

State Diagrams

Carol Britton , Jill Doake , in A Student Guide to Object-Oriented Development, 2005

Using state diagrams in system development

State diagrams model the system from the point of view of a single class and the events that can affect the objects of the class. They show all possible behaviours of objects of a class, and record the ordering of events, for example in the Wheels system a bike must be assigned a number before it can be hired. This information about timing constraints is vital for our understanding of the system, and is not recorded in any of the other system models that we cover in this book.

Although state diagrams are a very useful and important modelling technique, it is not necessary to draw one for every class. In most systems, complexity arises from interaction between objects of different classes, as modelled in sequence and collaboration diagrams (see Chapter 6). It may well be that in any system, particularly an information system, only a few classes will display dynamic behaviour and so need a state diagram to model what happens. This is the case with a system such as Wheels, where most classes have objects that undergo only a restricted set of events and all the objects respond to the same event in the same way. For example, all Customer objects in the Wheels case study system respond to events that happen to them in the same way, although with different values: recording details, finding an associated Hire object, displaying customer details and amending customer details. Their response to events does not depend on what state they are in. For this sort of class which has relatively simple behaviour there is not a lot to show on a state diagram. However, other types of computer system, for example process control or communication systems, frequently have a number of classes whose dynamic behaviour is extremely complex. For this sort of class it is important to document all the possible behaviours of the objects of the class by means of a state diagram.

As with all models that are produced as part of the development process, it is important to check that state diagrams are consistent with other diagrams. A state diagram of a particular class should be checked against interaction diagrams which involve objects of the class to ensure that all the events in the state diagram appear in the interaction diagram as an incoming message to the object. It should also be checked against the class diagram to make certain that every event and action corresponds to an operation on the relevant class.

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Business process and system modeling tools and packages

In Practical E-Manufacturing and Supply Chain Management, 2004

State diagrams

State diagrams are often used to represent the dynamic behavior of systems. The circles in a state diagram correspond to states of the system being modeled, and the arcs connecting those circles correspond to the events, which result in transitions between those states. The state diagram thus defines a set of possible sequences of events and states. Each state diagram must include at least one initial state and one final state (double circle). All sequences must begin with an initial state and continue until they terminate with a final state.

The set of states included in a state diagram can be thought of as a one-dimensional attribute space where the single attribute has values, which correspond to the possible states. A system behavior corresponds to a sequence of these states and each state diagram defines a process, that is, a set of such behaviors. For example, the state diagram permits the event sequences ac, abac, ababac, abababac, and so on. This entire set of sequences can be described by the regular expression a(ba)*c (refer Figure 5.18).

Figure 5.18. State diagram as a class of possible event sequences

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Unified Modeling Language

Janis Osis , Uldis Donins , in Topological UML Modeling, 2017

1.2.2.3 State Diagram

State diagram essentially is a state machine, consisting of states, transitions, events, and activities. While activity diagram shows a flow of control from activity to activity across number of objects involved in execution of those activities, state diagram shows flow of control from state to state within single object. State diagram specifies the sequences of states an object goes through during its lifetime in response to events, together with its responses to those events. The state diagram is included in UML specification since the first (1.1) version, it includes following elements:

•

State—shows a state of an object. For an object to be in a particular state it should met some condition or situation in its lifetime, perform some activity, or wait for some event. If we take a look at file writing software, it could have a set of following states—idle (the software waits for a new file to be written in hard drive), writing (its writing bytes of file to hard drive), and waiting (the file is locked for writing by another process). Launching of such file writing software puts it in the situation where it is waiting for next operation thus setting the state to Idle. When user wants to write file, an event of this will be fired and the status is changed to Writing. If the software comes to condition where the file is exclusively locked for writing, it is going to the state Waiting. After the file is unlocked the unlock event is fired and the software returns to Writing. See example in Fig. 1.28.

Figure 1.28. States of a file writing software.

•

Event—a specific occurrence or happening that plays a significant role in an object's lifetime and thus can trigger the state transition. See example in Fig. 1.28.

•

Transition—a directed relationship between a source state and a target state showing that an object will transit from one specified state to another if specific conditions are met and specific events occur. See example in Fig. 1.28.

•

Initial and final states—a special kind of states showing the initial state of an object and a final state. When the final state is reached, it means that the state machine is completed. These two states are similar to initial and final nodes in activity diagrams (see Section 1.2.2.2).

Fig. 1.28 shows an example of a state diagram showing states of file writing software.

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Usage Research Data Modeling

Rex Hartson , Pardha Pyla , in The UX Book (Second Edition), 2019

9.7.6 State Diagrams: The Next Step in Representing Task Sequencing and Navigation

A state diagram, a kind of hybrid between a flow model and a task sequence, is often useful for representing details of flow and navigation in the interaction view of design. A state diagram is a form of flow model, used to represent state changes (navigation among screens) in response to user input actions. This is an abstraction to show and understand the main workflow patterns and paths. See also Section 20.4.4.2.

State diagram (in UX)

A directed graph in which nodes are states which correspond to screens (in the broadest sense), and arcs (or arrows) are transitions between states resulting from user actions or system events. Used in wireflow and wireframe prototypes to show navigation among screens (Sections 9.7.6 and 20.4.4.2).

While a state diagram can be used to represent any level of detail, initial state diagrams are most useful for establishing initial wireframes if you stick with the main navigational paths and leave out unnecessary detail, such as error checking, confirmation dialogue, etc. In a transactional system, the flow model can get very complex and edge cases can multiply. An abstract state diagram can help you find the essence of the flow to form the backbone of the simplest version of the wireflow design. When you get to designs of wireframes for system screens, you can think of each screen as being a state in the state diagram. You are designing for things that "live" in that state. To avoid repetition with the full description of state diagrams, we refer you to Section 20.4.4.2 for more about what state diagrams are and how to make and use them.

In early design, your state diagrams can easily be translated into the structure of a wireframe. More details and examples are given in Chapter 20.

Task-sequence model

A step-by-step description of how a user might perform a task with a product or system, including task goals, intentions, triggers, and user actions (Section 9.7).

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Introducing parallel and distributed computing concepts in digital logic

Ramachandran Vaidyanathan , ... Suresh Rai , in Topics in Parallel and Distributed Computing, 2015

5.6.2 Finite State Machines

State diagrams of finite state machines can be used to reinforce the idea of a graph introduced in Section 5.2.1. In addition, finite state machine design examples can also convey PDC ideas. In this section we identify three such commonly used examples.

Bit serial adder: A bit-serial adder is a ripple-carry adder with only one full adder. An additional flip-flop conveys the carry-out of one bit position to the carry-in of the next bit position. This design, which uses few components, but which is slower and has synchronization requirements on the inputs and outputs, illustrates the cost performance trade-offs inherent in parallelism.

Bus arbiter: An arbiter selects one of a set of contenders according to some rule (which can be simple or as complex as the instructor wishes). When placed in the context of the earlier discussion of the bus, this illustrates the overheads inherent in sharing resources.

Pattern recognizer: A pattern recognizer accepts a stream of input symbols and outputs a 1 whenever the last k inputs coincide with a fixed reference string of length k. The reference string passes through the state diagram unimpeded from the initial state to the ACCEPT state. Any deviation from the reference string sets the progress back a little further away from the ACCEPT state. This is similar to a complex pipeline in which inputs move in tandem until something like a missed prediction causes the pipeline to start over.

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Event driven circuits

B. HOLDSWORTH BSc (Eng), MSc, FIEE , R.C. WOODS MA, DPhil , in Digital Logic Design (Fourth Edition), 2002

9.5 Races

When the state variables were allocated to the internal states of a clock-driven sequential circuit, the criterion for the allocation was that it should lead to a minimum hardware implementation. It was pointed out in the previous chapter that there is no known method for the allocation of the state variables that will lead to minimum hardware implementation, although guidelines were presented which, when used, lead to a simple, if not the simplest, circuit. The criterion for the allocation of state variables in event-driven circuits is somewhat different, and in this section those factors which govern this allocation will be examined.

An alternative state diagram for the light-switching problem is shown in Figure 9.3(a). An extra state S₅ has been introduced to allow an extra return path from the 'light-on' states S₂ and S₄ to the quiescent state S₀. Using the techniques described in section 9.4, the reduced state table and state diagram have been obtained. Four combinations of two state variables A and B have been arbitrarily allocated, one to each of the four states, and it will be noticed that when a transition is made from S₅ to S₀ on the signal XY, both of the state variables have to change. There are three possible cases to consider:

Figure 9.3. (a) Modified light switching state diagram (b) primitive state table (c) reduced state table (d) reduced state diagram exhibiting a non-critical race

1.

A and B change simultaneously: a direct transition is made from S₅ to S₀.

2.

A changes before B: the circuit makes a transition to S₀ via the route S₅ → S₃₄ → S₀.

3.

B changes before A: the circuit makes2 a transition to S₀ via the route S₅ → S₁₂ → S₀.

In all three cases the circuit enters a stable state S₀ and remains there until a further change of input variables occurs. The various transitions between states for the three conditions described above are illustrated in the reduced state table shown in Figure 9.3(c).

From the foregoing remarks it may be concluded that whenever two state variables change in response to a change in an input variable, a race condition exists. The condition has its origin in the different delays when the A and B signals are generated. In the case described above the races identified are both non-critical races since, irrespective of the transition made, the circuit always ends up in the same stable state.

However, there are races that can occur in event-driven circuits in which the final state reached depends upon the order in which the state variables change. Such races are termed critical races. For example, the internal state diagram of a state machine and its corresponding state table are shown in Figure 9.4. It will be assumed that the machine is in the state defined by AB = 00, and X = 0. If the input X is now changed to 1, the machine will make a direct transition to the stable state defined by X = 1 and AB = 11 (S₁) providing A and B change simultaneously. Alternatively, if A changes before B, the machine will make a transition to the state defined by X = 1 and AB = 10. Since this is a stable state, the circuit will remain there, and in fact a quick glance at the state diagram shows that the circuit remains locked in that state indefinitely because of the absence of an output path from the state. However, B may change before A and then the circuit will make a transition to the state defined by X = 1 and AB = 01. This state is unstable and the circuit makes a further transition to the state defined by X = 1 and AB = 11. The transitions described can clearly lead to faulty circuit operation. Critical races occur in this circuit because it is possible to end up in one of two stable states, depending on the order in which the state variables change. The various transitions which can take place in this circuit are indicated on the state table shown in Figure 9.4(b).

Figure 9.4. (a) State diagram for a circuit exhibiting critical races (b) State table illustrating a critical race

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Three Scenarios for combining UML and SDL96

Kurt Verschaeve , Anders Ek , in SDL '99, 1999

Nested State Diagrams

The UML state diagrams include the notion of nested hierarchical states. This concept is inherited from the Harel statecharts [Har87]. Basically it mean that a state can contain substates and while being in a substate, the class will also fire transitions originating from the superstate. In the current version of SDL, this is not possible, but SDL has the notion of statelists. A transition can be added to several states at the same time by listing the states in the state symbol

It can be shown that a hierarchical UML state diagram can be correctly translated to SDL using statelists when none of the substates have exit actions. In the other case, the substates containing exit actions, must be excluded from the statelist and get a duplication of all the transitions. Figure 8 shows an example of a nested state diagram in UML and SDL. Note that, unlike the exit action, the entry action in state Sub2, does not cause the duplication of transitions.

Figure 8. Flattening a State Diagram with Entry & Exit actions

UML differentiates between 6 events, each of which has a different mapping as shown in Table 6. In UML, an event is what triggers a transition. There is always exactly one event for each transition, possibly guarded with a guard-condition. Please refer to the UML semantics definition for a comprehensive explanation of all different events.

Table 6. Mapping of Events

UML Event		SDL Mapping
Call Event	⇔	RPC input
Guard on Event	⇔	Enabling Condition
Change Event (e.g. [x   <   10])	⇔	Continuous Signal
Time Event (e.g. after 5   sec)	⇒	Action on Transition
Signal Event	⇔	Input
Empty Event (or lambda transition)	⇔	Spontaneous Transition
Deferred Event (within state)	⇔	Save (Signal / RPC)

In UML, an action is anything that happens on a transition. Compared to OMT, UML differentiates between many kinds of actions, which makes it easy to achieve a detailed mapping, see Table 7.

Table 7. Mapping of Action

UML Action	⇔	SDL Mapping
Send : target.event(parameter)	⇔	Output event(parameter) TO target
Call	⇔	RPC Call
Local Invocation	⇔	Procedure Call
Create	⇔	Create
Terminate	⇔	Stop
Destroy	⇔	Output "destroy" signal
Return from submachine	⇔	Return
Uninterpreted	⇔	SDL Expression
• With":="		• Assignment
• With SDL keyword		• Expression
• Other		• TASK''

A number of UML concepts cannot be mapped to SDL because there is no equivalent and it would be too difficult to translate them. First, there are the history and deep-history states. Translating the history state to SDL would require duplicating the complete state diagram, which is unacceptable. Second, there are the concurrent and non-concurrent composite states. Composite states introduce concurrency within one class, but it is impossible to have concurrency in one SDL process. Related to this the fork and join states are not mapped either.

On the other side, there are a lot of SDL constructs that cannot be expressed in UML. For example the body of a newtype declaration, signal lists, connection of multiple channels, timers in general and priority. But there is one SDL feature that is particularly difficult to translate, namely the join. The join, together with the decision, allows one transition to have different paths and merge after some actions. On a translation from SDL to UML, all actions after the join must be duplicated, resulting in a many on one mapping.

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Clock-driven sequential circuits

B. HOLDSWORTH BSc (Eng), MSc, FIEE , R.C. WOODS MA, DPhil , in Digital Logic Design (Fourth Edition), 2002

Step 2 Step 2: The internal state diagram

A suitable state diagram, consisting of three states, for detecting the sequence 101 is shown in Figure 8.7(b). The reader should note that if X = 0 is received when the circuit is in state S₀, it will remain in that state and will continue to do so until the signal X = 1 arrives. Similarly if, after making a transition from S₀ → S₁ on the signal X = 1, a succession of 1's is received the circuit will remain in S₁ until such time as X = 0 arrives at the input, when a transition will be made to S₂. To define three states, two secondary variables A and B are required. Since there are four combinations of these variables there is one unused state S₃. If, due to faulty operation of the circuit, it should enter this state, it might be desirable to return to the main sequence of states as soon as possible. This can be achieved by returning S₃ to S₀ via a transition which is initiated by the first clock pulse that occurs after the entry into S₃.

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Coins, Wheels, and Oddments

Richard A. Epstein , in The Theory of Gambling and Statistical Logic (Second Edition), 2010

Probability of Winning a Set

From the set state diagram, Figure 5-12, we can deduce the probabilities g(p) of winning the set in 6, 7, 8, … games. Specifically,

$\begin{array}{c}\text{g}(p)=p^6+\left(\begin{array}{l}6\\ 1\end{array}\right)p^6(1-p)+\left(\begin{array}{l}7\\ 2\end{array}\right)p^6{(1-p)}^2+\left(\begin{array}{l}8\\ 3\end{array}\right)p^6{(1-p)}^3\\ +\left(\begin{array}{l}9\\ 4\end{array}\right)p^6{(1-p)}^4+\left(\begin{array}{c}10\\ 5\end{array}\right)p^7{(1-p)}^5\sum _{i=0}^{\infty }{[2p(1-p)]}^i\end{array}$

Collating the powers of p,

$\text{g(}p\text{)}\equiv \text{G(}p\text{)}=\frac{210p^6-888p^7+1545p^8-1370p^9+616p^{10}-112p^{11}}{1-2p+2p^2}$

where G(p) is defined on the interval [0, 1]. As expected, G(0) = 0, G(1) = 1, and G(1/2) = 1/2; for values of p greater than 1/2, G(p) > p. Further, G(1 − p) = 1 − G(p). When one player has probability p = 0.55 of winning each game, we have G(0.55) = 0.64 for the probability of winning the set. For p = 0.6, G(0.6) equals 0.77.

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Luminescence

J.N. Demas , S.E. Demas , in Encyclopedia of Physical Science and Technology (Third Edition), 2003

III.A Spin Multiplicity

A simplified excited state diagram is pictured in Fig. 3. Details of the quantum mechanical origins and nature of excited states are not presented here. The system is characterized by a singlet ground state, denoted by S _o, and singlet excited states, denoted by S _i (I   =   1, 2, …). Singlet states arise when all the electrons are spin-paired. Also shown in the excited manifold is the lowest triplet state, denoted by T ₁. Triplets arise when there are two unpaired spins. This type of system corresponds to the vast majority of organic molecular species and occurs when the lowest energy configuration of the system is due to all of the electrons being spin-paired.

FIGURE 3. Schematic energy level diagram, or Jablonski diagram, for a molecule showing the possible paths of energy degradation. Solid lines represent radiative emission processes, and dashed lines represent nonradiative processes. Rate constants and efficiencies of the indicated constants are denoted by k's and Φ's. [Reprinted with permission from Demas, J. N. (1983). J. Chem. Ed. 60, 803. Copyright 1983 Division of Chemical Education, American Chemical Society.]

Excited states of such a system generally arise when a paired electron is promoted from a filled to an unoccupied orbital. The electron can remain paired with the electron left behind to form excited singlet states, or it can undergo a "spin flip" and become unpaired; this results in a triplet state. The triplet state derived from a specific orbital promotion is of lower energy than the corresponding singlet state (Figs. 1 and 3).

Oxygen and metal ions are the common stable exceptions to this type of excited state diagram. Atomic species in flames or discharges are also frequent exceptions. Oxygen has a triplet ground state with singlet and triplet excited states. The ordering of excited singlets and triplets are inverted over those of Fig. 1, however, with the singlets being below their corresponding triplets. Metal ions can exhibit a multitude of excited state multiplicities, which can range from doublets (one unpaired electron) for Cu²⁺ and Na, quartets (three unpaired electrons) for Cr³⁺, and octets (seven unpaired electrons) for Eu²⁺.

Regardless of the nature of the ground state, however, the excited states can have spin multiplicities that are the same as, or different from, the ground state. Spin selection rules control whether a transition between states is allowed or forbidden. Transitions between states of the same multiplicity are spin-allowed, while all others are forbidden. Forbiddenness does not mean that a transition will not occur at all, but that it will not occur as readily as an allowed one. Allowed transitions are characterized by strong absorptions, large rate constants, and short lifetimes. Spin-forbidden transitions exhibit weak absorptions, long lifetimes, and low rate constants. Compare the allowed 400-nm absorption with the forbidden 650-nm absorption of anthracene (Fig. 1), where the allowed higher-energy transition is 10⁸ times more intense.

Figure 3 is based on the assumption that spin is always a good quantum number. This assumption is not always correct, especially for species of high atomic number. Spin-orbit coupling can mix orbital and spin-angular momentum, and then the concept of electron spin fails. It is necessary to discuss the states of the system in terms of the good quantum number J. Pragmatically, spin-orbit coupling scrambles the singlet and triplet states and gives a large component of the other spin character to the state. Thus, the mixing of singlet character into a triplet state can greatly increase the allowedness of spin-forbidden transitions.

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